Typically, an integrated circuit is supplied with a core power supply voltage (VDDC) intended for a core logic circuit of the integrated circuit and an input and output power supply voltage (VDDIO) intended for input and output (IO) circuits in the integrated circuit. VDDC is usually lesser than VDDIO. In an existing scenario, it is desired that the integrated circuit saves power and hence the integrated circuit is operated at a low VDDC. Further, VDDC is inactivated in certain portions of the core logic circuit in a sleep mode, and activated in a wake-up mode. However, there can be short circuit power dissipation at output drivers of the IO circuits when VDDC is inactivated. The short circuit power dissipation at the output drivers can also occur during power up of the integrated circuit when VDDIO is provided before VDDC. Further, the IO circuit needs to be operated at different VDDIOs during different modes of operation, for example at 1.2V and at 1.8V, to optimize power and performance. Hence, there is a need for a power supply detection circuit that detects presence of core and IO power supply voltages used by the integrated circuit. There is also a need to ensure protection of the IO circuits and minimize power dissipation.